Signal driver circuits (“drivers”) are utilized in transceivers (or transmitters) to place or provide a desired signal, such as an analog or digital communication signal, on a communication line or other communication medium, such as the cables of twisted pairs utilized in digital subscriber line (“DSL”) systems. In general, it is highly desirable for such drivers to provide a high degree of linearity, such that the signal placed on the communication line is an amplified replica of the desired signal, without the introduction of various distortions, such as non-linearities and noise.
Prior art linear signal driver circuits, however, are generally very inefficient, largely due to a high ratio of peak-to-rms (root-mean-square) signal voltages, such that only a small percentage of input power is coupled to the signal placed on the communication line. The efficiency of a prior art linear driver is inversely proportional to the ratio of peak-to-rms signal voltages, with efficiencies generally in the range of twenty percent or less.
FIG. 1 is a circuit diagram illustrating a prior art linear driver 10. As illustrated, Vin 20 is the desired signal, represented as an input voltage, to be provided in amplified form as an output voltage (or output signal), Vout 45, on a communication line, which is represented as a resistive load “RL” 35. DC power supply and bias voltages are provided for the circuit by one or more power supplies, represented as Vcc 15 or as Vs in the various diagrams, with the driving or amplification performed by operational amplifier 40, and transistors Q125 and Q230.
In such a prior art linear driver 10, because of the low efficiencies, a large percentage of the input power to the signal drivers is dissipated as heat, imposing cooling requirements within the transceiver. Since most of the power to a transceiver is used by the signal drivers, the corresponding efficiency of such a transceiver is undesirably low, which imposes increased power supply requirements for the transceiver.
Using the relationship between the DC current (average current “Idc”) and the RMS current (“Inns”) for a system where the signal has a truncated Gaussian probability distribution function (“PDF”) with a peak-to-rms ratio (“pk2rms”) of 3 or greater (about 1% accuracy at 3 to 1 pk2rms), then   Idc  =                    2        π              ·          Irms      .      The total power dissipated in such a system is Idc*Vdc, where Vdc is the total supply voltage of the system (e.g., if the drivers run from +/−10 Volts, then Vdc=20).
For such a prior art linear driver circuit 10 as illustrated in FIG. 1, assuming Vout has a truncated Gaussian PDF and peak-to-rms ratio of 3 or greater, and that RL is composed of two parts, a source resistance Rs and a termination resistance Rt, it may be shown that the theoretical maximum efficiency of the linear driver is:       Theoretical_Maximum    ⁢    _Efficiency    =                    π        2              ·                  1                  pk2rms          ·                      (                          1              +                              Rs                Rt                                      )                              .      For the case of the DSL standard referred to as HDSL-2 CO (with CO referring to a Central Office), in which Rs=Rt and pk2rms=4.0, the theoretical maximum efficiency is 15.7%. Actual efficiencies however, including overhead voltages and currents in the driver, will be significantly less, with the best case for a real HDSL-2 CO driver having an efficiency of approximately 8.6%. In such a prior art HDSL-2 CO driver, approximately 90% of the power supply energy is dissipated as heat.
As a consequence, a need remains for a signal driver circuit, which has significantly improved power efficiency, while retaining significant linearity and accuracy. Such a signal driver circuit should also be readily implementable, should be backwards compatible for use in existing technologies, and should be capable of embodiment without undue expense.